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74ALVCH162836DLRG4

74ALVCH162836DLRG4
Mfr. #:
74ALVCH162836DLRG4
Beschreibung:
Universal Bus Functions 20-Bit Univ Bus Drv With 3-State Outputs
Lebenszyklus:
Neu von diesem Hersteller.
Datenblatt:
74ALVCH162836DLRG4 Datenblatt
Die Zustellung:
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ECAD Model:
Mehr Informationen:
74ALVCH162836DLRG4 Mehr Informationen 74ALVCH162836DLRG4 Product Details
Produkteigenschaft
Attributwert
Hersteller:
Texas Instruments
Produktkategorie:
Universelle Busfunktionen
RoHS:
Y
Logikfamilie:
74AL
Anzahl Kreise:
1
Ausbreitungsverzögerungszeit:
5.5 ns
Versorgungsspannung - Max.:
3.6 V
Versorgungsspannung - Min.:
1.65 V
Minimale Betriebstemperatur:
- 40 C
Maximale Betriebstemperatur:
+ 85 C
Paket / Koffer:
SSOP-56
Verpackung:
Spule
Funktion:
Universeller Busfahrer
Höhe:
2.59 mm
Länge:
18.41 mm
Ausgabetyp:
3-State
Breite:
7.49 mm
Marke:
Texas Instruments
Montageart:
SMD/SMT
Versorgungsstrom - Max.:
40 uA
Ausgangsstrom auf hohem Niveau:
- 12 mA
Niedriger Ausgangsstrom:
12 mA
Betriebsversorgungsspannung:
1.65 V to 3.6 V
Polarität:
Nicht invertiert
Produktart:
Universelle Busfunktionen
Werkspackungsmenge:
1
Unterkategorie:
Logik-ICs
Gewichtseinheit:
0.021164 oz
Tags
74ALVCH162836, 74ALVCH16283, 74ALVCH1628, 74ALVCH162, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS DVR 20BIT 56SSOP
***as Instruments
This 20-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when the latch-enable (LE\) input is low. When LE\ is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162836 is characterized for operation from –40C to 85C.
Teil # Beschreibung Aktie Preis
74ALVCH162836DLRG4
DISTI # 74ALVCH162836DLRG4-ND		IC UNIV BUS DVR 20BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)		Limited Supply - Call
    74ALVCH162836DLRG4
    DISTI # 595-74ALVCH162836DLR    		Universal Bus Functions 20-Bit Univ Bus Drv With 3-State Outputs
    RoHS: Compliant    		0
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      		 Neu und Original
      Verfügbarkeit
      Aktie:
      Available
      Auf Bestellung:
      4500
      Menge eingeben:
      Der aktuelle Preis von 74ALVCH162836DLRG4 dient nur als Referenz. Wenn Sie den besten Preis erhalten möchten, senden Sie bitte eine Anfrage oder senden Sie eine direkte E-Mail an unser Verkaufsteam [email protected]
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