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SN74ALVCH16841DGGR

SN74ALVCH16841DGGR
Mfr. #:
SN74ALVCH16841DGGR
Beschreibung:
Latches 20bit Bus Interface
Lebenszyklus:
Neu von diesem Hersteller.
Datenblatt:
SN74ALVCH16841DGGR Datenblatt
Die Zustellung:
DHL FedEx Ups TNT EMS
Zahlung:
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ECAD Model:
Mehr Informationen:
SN74ALVCH16841DGGR Mehr Informationen SN74ALVCH16841DGGR Product Details
Produkteigenschaft
Attributwert
Hersteller:
Texas Instruments
Produktkategorie:
Verschlüsse
RoHS:
Y
Anzahl Kreise:
2 Circuit
Logiktyp:
Wahr
Logikfamilie:
74ALV
Polarität:
Nicht invertiert
Ruhestrom:
40 uA
Anzahl der Ausgangsleitungen:
3 Line
Ausgangsstrom auf hohem Niveau:
- 24 mA
Niedriger Ausgangsstrom:
32 mA
Ausbreitungsverzögerungszeit:
4.7 ns, 3.9 ns
Versorgungsspannung - Max.:
3.6 V
Versorgungsspannung - Min.:
1.65 V
Minimale Betriebstemperatur:
- 40 C
Maximale Betriebstemperatur:
+ 85 C
Paket / Koffer:
TSSOP-56
Verpackung:
Spule
Funktion:
20 bit Bus Interface
Höhe:
1.15 mm
Länge:
14 mm
Ausgabetyp:
3-State
Serie:
SN74ALVCH16841
Typ:
D-Typ
Breite:
6.1 mm
Marke:
Texas Instruments
Montageart:
SMD/SMT
Anzahl der Kanäle:
20 Channels
Anzahl der Eingabezeilen:
20 Line
Betriebsversorgungsspannung:
1.65 V to 3.6 V
Produktart:
Verschlüsse
Reset-Typ:
Kein Zurücksetzen
Werkspackungsmenge:
2000
Unterkategorie:
Logik-ICs
Gewichtseinheit:
0.008917 oz
Tags
SN74ALVCH1684, SN74ALVCH168, SN74ALVCH1, SN74ALVCH, SN74ALVC, SN74ALV, SN74AL, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
    M***v
    M***v
    RU

    We need to check... And so like norms ..

    2019-04-24
    V***e
    V***e
    PT

    Almost two months traveled and finally got there. Already the need for it has disappeared. Come on. I do not even know the worker or not, but intact.

    2019-05-01
***as Instruments
20-Bit Bus-Interface D-Type Latch With 3-State Outputs 56-TSSOP -40 to 85
***ical
Latch Transparent 3-ST 20-CH D-Type 56-Pin TSSOP T/R
***i-Key
IC BUS-INTERFACE LATCH 56-TSSOP
***i-Key Marketplace
SN74ALVCH16841 20-BIT BUS-INTERF
***ark
ICs, Latches Logic; Logic Family:ALVC; Supply Voltage Min:1.65V; Supply Voltage Max:3.6V; Package/Case:56-TSSOP; No. of Pins:56; Operating Temperature Range:-40°C to +85°C; Input Type:LVTTL; Leaded Process Compatible:Yes ;RoHS Compliant: Yes
***AS
This 20-bit bus-interface D-type latch is designed for 1.65-V to 3.6-V VCC operation.
***XS
The SN74ALVCH16841 features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. This device is particularly suitable for implementing buffer registers, unidirectional bus drivers, and working registers.
***AS INSTRUMEN
The SN74ALVCH16841 can be used as two 10-bit latches or one 20-bit latch. The 20 latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs. While the latch-enable (1LE or 2LE) input is high, the Q outputs of the corresponding 10-bit latch follow the D inputs. When LE is taken low, the Q outputs are latched at the levels set up at the D inputs.
***AS INSTR
A buffered output-enable (1OE\ or 2OE\) input can be used to place the outputs of the corresponding 10-bit latch in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
***NS
OE\ does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
***as Instr.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
***AS INTRUMENTS
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
***AS INSTR
The SN74ALVCH16841 is characterized for operation from -40°C to 85°C.
Logic Solutions
OMO Electronic Logic Solutions offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TI's process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products.Learn More
Teil # Beschreibung Aktie Preis
SN74ALVCH16841DGGR
DISTI # 29455648		Latch Transparent 3-ST 20-CH D-Type 56-Pin TSSOP T/R
RoHS: Compliant		10000
  • 2000:$2.2473
SN74ALVCH16841DGGR
DISTI # 296-6261-1-ND		IC BUS-INTERFACE LATCH 56-TSSOP
RoHS: Compliant
Min Qty: 1
Container: Cut Tape (CT)		1949In Stock
  • 1000:$2.4629
  • 500:$2.9203
  • 100:$3.4305
  • 10:$4.1870
  • 1:$4.6600
SN74ALVCH16841DGGR
DISTI # 296-6261-6-ND		IC BUS-INTERFACE LATCH 56-TSSOP
RoHS: Compliant
Min Qty: 1
Container: Digi-Reel®		1949In Stock
  • 1000:$2.4629
  • 500:$2.9203
  • 100:$3.4305
  • 10:$4.1870
  • 1:$4.6600
SN74ALVCH16841DGGR
DISTI # 296-6261-2-ND		IC BUS-INTERFACE LATCH 56-TSSOP
RoHS: Compliant
Min Qty: 2000
Container: Tape & Reel (TR)		Temporarily Out of Stock
  • 2000:$2.2716
SN74ALVCH16841DGGR
DISTI # V39:1801_07328226		Latch Transparent 3-ST 20-CH D-Type 56-Pin TSSOP T/R
RoHS: Compliant		0
    SN74ALVCH16841DGGR
    DISTI # SN74ALVCH16841DGGR    		Latch Transparent 3-ST 20-CH D-Type 56-Pin TSSOP T/R - Tape and Reel (Alt: SN74ALVCH16841DGGR)
    RoHS: Compliant
    Min Qty: 2000
    Container: Reel    		Americas - 0
    • 20000:$2.0900
    • 8000:$2.1900
    • 12000:$2.1900
    • 4000:$2.2900
    • 2000:$2.3900
    SN74ALVCH16841DGGR
    DISTI # SN74ALVCH16841DGGR    		Latch Transparent 3-ST 20-CH D-Type 56-Pin TSSOP T/R (Alt: SN74ALVCH16841DGGR)
    RoHS: Compliant
    Min Qty: 2000
    Container: Tape and Reel    		Europe - 0
    • 20000:€1.9900
    • 12000:€2.0900
    • 8000:€2.1900
    • 4000:€2.4900
    • 2000:€2.7900
    SN74ALVCH16841DGGR20-Bit Bus-Interface D-Type Latch With 3-State Outputs5900
    • 1000:$1.9400
    • 750:$2.0300
    • 500:$2.4100
    • 250:$2.8400
    • 100:$3.0200
    • 25:$3.4500
    • 10:$3.7100
    • 1:$4.1200
    SN74ALVCH16841DGGR
    DISTI # 595-74ALVCH16841DGGR    		Latches 20bit Bus Interface
    RoHS: Compliant    		0
    • 1:$4.5200
    • 10:$4.0700
    • 100:$3.3300
    • 250:$3.1200
    • 500:$2.8300
    • 1000:$2.3900
    • 2000:$2.2700
    SN74ALVCH16841DGGRBus Driver, ALVC/VCX/A Series, 2-Func, 10-Bit, True Output, CMOS, PDSO56
    RoHS: Compliant    		3884
    • 1000:$2.2500
    • 500:$2.3700
    • 100:$2.4700
    • 25:$2.5700
    • 1:$2.7700
    SN74ALVCH16841DGGR*** FREE SHIPPING ORDERS OVER $100 *** Latch, Dual, 10 Bit, 56 Pin, Plastic, TSSOP3420
    • 1819:$1.5750
    • 1112:$1.6500
    • 1:$4.5000
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    Verfügbarkeit
    Aktie:
    Available
    Auf Bestellung:
    1984
    Menge eingeben:
    Der aktuelle Preis von SN74ALVCH16841DGGR dient nur als Referenz. Wenn Sie den besten Preis erhalten möchten, senden Sie bitte eine Anfrage oder senden Sie eine direkte E-Mail an unser Verkaufsteam [email protected]
    Referenzpreis (USD)
    Menge
    Stückpreis
    ext. Preis
    1
    4,52 $
    4,52 $
    10
    4,07 $
    40,70 $
    100
    3,33 $
    333,00 $
    250
    3,12 $
    780,00 $
    500
    2,83 $
    1 415,00 $
    1000
    2,39 $
    2 390,00 $
    Aufgrund von Halbleiterknappheit ab 2021 ist der untere Preis der Normalpreis vor 2021. Bitte senden Sie eine Anfrage zur Bestätigung.
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