OMAPL138EZWTD4E

OMAPL138EZWTD4E
Mfr. #:
OMAPL138EZWTD4E
Beschreibung:
Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
Lebenszyklus:
Neu von diesem Hersteller.
Datenblatt:
OMAPL138EZWTD4E Datenblatt
Die Zustellung:
DHL FedEx Ups TNT EMS
Zahlung:
T/T Paypal Visa MoneyGram Western Union
ECAD Model:
Mehr Informationen:
OMAPL138EZWTD4E Mehr Informationen OMAPL138EZWTD4E Product Details
Produkteigenschaft
Attributwert
Hersteller:
Texas Instruments
Produktkategorie:
Digitale Signalprozessoren & Controller - DSP, DSC
RoHS:
Y
Montageart:
SMD/SMT
Paket / Koffer:
PBGA-361
Serie:
OMAP-L138
Produkt:
DSPs
Kern:
TMS320C674x, ARM926EJ-S
Maximale Taktfrequenz:
456 MHz, 456 MHz
L1-Cache-Befehlsspeicher:
32 kB, 16 kB
L1-Cache-Datenspeicher:
32 kB, 16 kB
Daten-RAM-Größe:
8 kB
Betriebsversorgungsspannung:
1.3 V
Minimale Betriebstemperatur:
- 40 C
Maximale Betriebstemperatur:
+ 105 C
Verpackung:
Tablett
Höhe:
0.94 mm
Länge:
13 mm
Breite:
13 mm
Marke:
Texas Instruments
Daten-ROM-Größe:
64 kB
Oberflächentyp:
I2C, Parallel, SPI, USB
Datenbusbreite:
16 bit, 32 bit
E/A-Spannung:
1.8 V, 3.3 V
Anweisungstyp:
Fest-/Gleitkomma
L2-Cache-Anweisung / Datenspeicher:
256 kB
MFLOPS:
2746 MFLOPS
Feuchtigkeitsempfindlich:
ja
Anzahl der Kerne:
2 Core
Anzahl Timer/Zähler:
3 Timer
Prozessorserie:
OMAP
Produktart:
DSP - Digitale Signalprozessoren & Controller
Werkspackungsmenge:
90
Unterkategorie:
Eingebettete Prozessoren und Controller
Versorgungsspannung - Max.:
1.35 V
Versorgungsspannung - Min.:
1.25 V
Handelsname:
OMAP
Watchdog-Timer:
Watchdog-Timer
Gewichtseinheit:
0.027845 oz
Tags
OMAPL138EZWTD, OMAPL138EZW, OMAPL138E, OMAPL138, OMAPL1, OMAPL, OMAP, OMA
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
C674x DSP+Arm Processor - 456MHz 361-NFBGA -40 to 90
***et Europe
DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA
***i-Key
IC MPU OMAP-L1X 456MHZ 361NFBGA
***ical
SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA Tray
***p One Stop Global
OMAP-L138 C6000 DSP+ARM PROCESSOR
***ark
OMAPL138EZWTD4E freon 2.3
***ASIN
The OMAP-L138 C6000 DSP+ARM processor is a low-power applications processor based on an ARM926EJ-S and a C674x DSP core. This processor provides significantly lower power than other members of the TMS320C6000™ platform of DSPs.
***ASIN
The device enables original-equipment manufacturers (OEMs) and original-design manufacturers (ODMs) to quickly bring to market devices with robust operating systems, rich user interfaces, and high processor performance through the maximum flexibility of a fully integrated, mixed processor solution.
***AS INSRUMENTS
The dual-core architecture of the device provides benefits of both DSP and reduced instruction set computer (RISC) technologies, incorporating a high-performance TMS320C674x DSP core and an ARM926EJ-S core.
***NS
The ARM926EJ-S is a 32-bit RISC processor core that performs 32-bit or 16-bit instructions and processes 32-, 16-, or 8-bit data. The core uses pipelining so that all parts of the processor and memory system can operate continuously.
***AS INSTRUMEN
The ARM9 core has a coprocessor 15 (CP15), protection module, and data and program memory management units (MMUs) with table look-aside buffers. The ARM9 core has separate 16-KB instruction and 16-KB data caches. Both caches are 4-way associative with virtual index virtual tag (VIVT). The ARM9 core also has 8KB of RAM (Vector Table) and 64KB of ROM.
***AS INSRUMENTS
The device DSP core uses a 2-level cache-based architecture. The level 1 program cache (L1P) is a 32-KB direct mapped cache, and the level 1 data cache (L1D) is a 32-KB 2-way, set-associative cache. The level 2 program cache (L2P) consists of a 256-KB memory space that is shared between program and data space. L2 memory can be configured as mapped memory, cache, or combinations of the two. Although the DSP L2 is accessible by the ARM9 and other hosts in the system, an additional 128KB of RAM shared memory is available for use by other hosts without affecting DSP performance.
***
For security-enabled devices, TI’s Basic Secure Boot lets users protect proprietary intellectual property and prevents external entities from modifying user-developed algorithms. By starting from a hardware-based “root-of-trust,” the secure boot flow ensures a known good starting point for code execution. By default, the JTAG port is locked down to prevent emulation and debug attacks; however, the JTAG port can be enabled during the secure boot process during application development. The boot modules are encrypted while sitting in external nonvolatile memory, such as flash or EEPROM, and are decrypted and authenticated when loaded during secure boot. Encryption and decryption protects the users’ IP and lets them securely set up the system and begin device operation with known, trusted code.
***as Instruments Inc.
Basic Secure Boot uses either SHA-1 or SHA-256, and AES-128 for boot image validation. Basic Secure Boot also uses AES-128 for boot image encryption. The secure boot flow employs a multilayer encryption scheme which not only protects the boot process but also offers the ability to securely upgrade boot and application software code. A 128-bit device-specific cipher key, known only to the device and generated using a NIST-800-22 certified random number generator, is used to protect user encryption keys. When an update is needed, the customer uses the encryption keys to create a new encrypted image. Then the device can acquire the image through an external interface, such as Ethernet, and overwrite the existing code. For more details on the supported security features or TI’s Basic Secure Boot, see the .
***AS
The peripheral set includes: a 10/100 Mbps Ethernet media access controller (EMAC) with a management data input/output (MDIO) module; one USB2.0 OTG interface; one USB1.1 OHCI interface; two I2C Bus interfaces; one multichannel audio serial port (McASP) with 16 serializers and FIFO buffers; two multichannel buffered serial ports (McBSPs) with FIFO buffers; two serial peripheral interfaces (SPIs) with multiple chip selects; a configurable 16-bit host-port interface (HPI); up to 9 banks of general-purpose input/output (GPIO) pins, with each bank containing 16 pins with programmable interrupt and event generation modes, multiplexed with other peripherals; three UART interfaces (each with RTS and CTS); two enhanced high-resolution pulse width modulator (eHRPWM) peripherals; three 32-bit enhanced capture (eCAP) module peripherals which can be configured as 3 capture inputs or 3 APWM outputs; two external memory interfaces: an asynchronous and SDRAM external memory interface (EMIFA) for slower memories or peripherals; and a higher speed DDR2/Mobile DDR controller.
***AS
The EMAC provides an efficient interface between the device and a network. The EMAC supports both 10Base-T and 100Base-TX, or 10 Mbps and 100 Mbps in either half- or full-duplex mode. Additionally, an MDIO interface is available for PHY configuration. The EMAC supports both MII and RMII interfaces.
***ASIN
The Serial ATA (SATA) controller provides a high-speed interface to mass data storage devices. The SATA controller supports both SATA I (1.5 Gbps) and SATA II (3.0 Gbps).
***AS INSRUMENTS
The Universal Parallel Port (uPP) provides a high-speed interface to many types of data converters, FPGAs, or other parallel devices. The uPP supports programmable data widths between 8- to 16-bits on both channels. Single-data rate and double-data rate transfers are supported as well as START, ENABLE, and WAIT signals to provide control for a variety of data converters.
***AS INTRUMENTS
A video port interface (VPIF) provides a flexible video I/O port.
***AS INSTRUMENTS INC
The rich peripheral set provides the ability to control external peripheral devices and communicate with external processors. For details on each peripheral, see the related sections in this document and the associated peripheral reference guides.
***as Instr.
The device has a complete set of development tools for the ARM9 and DSP. These tools include C compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows debugger interface for visibility into source code execution.
Processors
OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.
Teil # Beschreibung Aktie Preis
OMAPL138EZWTD4E
DISTI # V39:1801_07303368
SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA64
  • 100:$26.0100
  • 10:$29.9500
  • 1:$32.3300
OMAPL138EZWTD4E
DISTI # 296-42794-ND
IC MPU OMAP-L1X 456MHZ 361NFBGA
RoHS: Compliant
Min Qty: 1
Container: Tray
1803In Stock
  • 180:$27.9953
  • 90:$31.3106
  • 10:$32.7840
  • 1:$35.5500
OMAPL138EZWTD4E
DISTI # 29412143
SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA64
  • 1:$29.1900
OMAPL138EZWTD4E
DISTI # OMAPL138EZWTD4E
DSP Fixed-Point/Floating-Point 32-Bit 456MHz 3648MIPS 361-Pin NFBGA - Trays (Alt: OMAPL138EZWTD4E)
RoHS: Compliant
Min Qty: 90
Container: Tray
Americas - 0
  • 90:$30.6900
  • 180:$29.8900
  • 360:$28.7900
  • 540:$28.0900
  • 900:$27.5900
OMAPL138EZWTD4EC6000 DSP+ARM Processor1798
  • 1000:$20.9300
  • 750:$21.0000
  • 500:$23.3900
  • 250:$24.8600
  • 100:$25.0500
  • 25:$28.1800
  • 10:$29.1000
  • 1:$31.1300
OMAPL138EZWTD4E
DISTI # 595-OMAPL138EZWTD4E
Digital Signal Processors & Controllers - DSP, DSC C6000 DSP+ARM Processor
RoHS: Compliant
43
  • 1:$35.5500
  • 5:$34.0800
  • 10:$32.7900
  • 25:$31.3200
  • 100:$28.0000
  • 250:$26.7100
OMAPL138EZWTD4EMicroprocessor Circuit, CMOS, PBGA361
RoHS: Compliant
180
  • 1000:$24.2400
  • 500:$25.5100
  • 100:$26.5600
  • 25:$27.7000
  • 1:$29.8300
OMAPL138EZWTD4E
DISTI # C1S746203694997
SOC OMAPL1xx ARM926EJ-S 361-Pin NFBGA
RoHS: Compliant
64
  • 90:$29.1900
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Ethernet ICs 10/100 BASE-TX Physical Layer Transceiver
TLK100PHP

Mfr.#: TLK100PHP

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Ethernet ICs Industrl Ethrnet PHY
MAX16051ETI+

Mfr.#: MAX16051ETI+

OMO.#: OMO-MAX16051ETI-

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MIC2782ELYCS-TR

Mfr.#: MIC2782ELYCS-TR

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Supervisory Circuits Dual Input Push Button Reset IC with RESET and ANDOUT Outputs
TRS232ECDR

Mfr.#: TRS232ECDR

OMO.#: OMO-TRS232ECDR

RS-232 Interface IC Dual RS232 Drvr/Rcvr
MAX3223EUP+

Mfr.#: MAX3223EUP+

OMO.#: OMO-MAX3223EUP-

RS-232 Interface IC 3-5.5V 1Mbps Transceiver
SN74HC125PWR

Mfr.#: SN74HC125PWR

OMO.#: OMO-SN74HC125PWR

Buffers & Line Drivers Quad Bus Buff Gate With 3-State Outputs
Verfügbarkeit
Aktie:
43
Auf Bestellung:
2026
Menge eingeben:
Der aktuelle Preis von OMAPL138EZWTD4E dient nur als Referenz. Wenn Sie den besten Preis erhalten möchten, senden Sie bitte eine Anfrage oder senden Sie eine direkte E-Mail an unser Verkaufsteam [email protected]
Referenzpreis (USD)
Menge
Stückpreis
ext. Preis
1
35,55 $
35,55 $
5
34,08 $
170,40 $
10
32,79 $
327,90 $
25
31,32 $
783,00 $
100
28,00 $
2 800,00 $
250
26,71 $
6 677,50 $
Aufgrund von Halbleiterknappheit ab 2021 ist der untere Preis der Normalpreis vor 2021. Bitte senden Sie eine Anfrage zur Bestätigung.
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