SM320C6457CGMHS

SM320C6457CGMHS
Mfr. #:
SM320C6457CGMHS
Beschreibung:
Digital Signal Processors & Controllers - DSP, DSC Comm Infrastructure DSP
Lebenszyklus:
Neu von diesem Hersteller.
Datenblatt:
SM320C6457CGMHS Datenblatt
Die Zustellung:
DHL FedEx Ups TNT EMS
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ECAD Model:
Mehr Informationen:
SM320C6457CGMHS Mehr Informationen SM320C6457CGMHS Product Details
Produkteigenschaft
Attributwert
Hersteller:
Texas Instruments
Produktkategorie:
Digitale Signalprozessoren & Controller - DSP, DSC
RoHS:
N
Serie:
SM320C6457-HIREL
Minimale Betriebstemperatur:
- 55 C
Maximale Betriebstemperatur:
+ 100 C
Verpackung:
Tablett
Marke:
Texas Instruments
Feuchtigkeitsempfindlich:
ja
Produktart:
DSP - Digitale Signalprozessoren & Controller
Werkspackungsmenge:
60
Unterkategorie:
Eingebettete Prozessoren und Controller
Tags
SM320C645, SM320C64, SM320C6, SM320C, SM320, SM32, SM3
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***as Instruments
High reliability product C6457 fixed point DSP 688-FCBGA -55 to 100
***et Europe
DSP Fixed-Point 32-Bit 1200MHz 9600MIPS 688-Pin FCBGA
***ical
SM320C6457-HIREL Communications Infrastructure Digital Signal Processor
***AS INSTRUMENTS INC
The TMS320C64x+™ DSPs (including the SM320C6457-HIREL device) are the highest-performance fixed-point DSP generation in the TMS320C6000™ DSP platform. The SM320C6457-HIREL device is based on the third-generation high-performance, advanced VelociTI™ very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI), making these DSPs an excellent choice for applications including video and telecom infrastructure, imaging/medical, and wireless infrastructure (WI). The C64x+ devices are upward code-compatible from previous devices that are part of the C6000™ DSP platform.
***INS
Based on 65-nm process technology and with performance of up to 9600 million instructions per second (MIPS) [or 9600 16-bit MMACs per cycle] at a 1.2-GHz clock rate, the SM320C6457-HIREL device offers cost-effective solutions to high-performance DSP programming challenges. The SM320C6457-HIREL DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors.
***
The C64x+ DSP core employs eight functional units, two register files, and two data paths. Like the earlier C6000 devices, two of these eight functional units are multipliers or .M units. Each C64x+ .M unit doubles the multiply throughput versus the C64x core by performing four 16-bit × 16-bit multiply-accumulates (MACs) every clock cycle. Thus, eight 16-bit × 16-bit MACs can be executed every cycle on the C64x+ core. At a 1.2-GHz clock rate, this means 9600 16-bit MMACs can occur every second. Moreover, each multiplier on the C64x+ core can compute one 32-bit × 32-bit MAC or four 8-bit × 8-bit MACs every clock cycle.
***AS
The SM320C6457-HIREL device includes Serial RapidIO®. This high-bandwidth peripheral dramatically improves system performance and reduces system cost for applications that include multiple DSPs on a board, such as video and telecom infrastructures and medical/imaging.
***AS INSTR
The SM320C6457-HIREL DSP integrates a large amount of on-chip memory organized as a two-level memory system. The level-1 (L1) program and data memories on the SM320C6457-HIREL device are 32KB each. This memory can be configured as mapped RAM, cache, or some combination of the two. When configured as cache, L1 program (L1P) is a direct mapped cache whereas L1 data (L1D) is a two-way set associative cache. The level 2 (L2) memory is shared between program and data space and is 2048KB in size. L2 memory can also be configured as mapped RAM, cache, or some combination of the two. L2 is configurable up to 1MB of cache. The C64x+ Megamodule also has a 32-bit peripheral configuration (CFG) port, an internal DMA (IDMA) controller, a system component with reset/boot control, interrupt/exception control, a power-down control, and a free-running 32-bit timer for time stamp.
***AS INSTRU
The peripheral set includes: an inter-integrated circuit bus module (I2C); two multichannel buffered serial ports (McBSPs); an 8-bit Universal Test and Operations PHY Interface for Asynchronous Transfer Mode (ATM) Slave [UTOPIA Slave] port; two 64-bit general-purpose timers (also configurable as four 32-bit timers); a user-configurable 16-bit or 32-bit host-port interface (HPI16/HPI32); a 16-pin general-purpose input/output port (GPIO) with programmable interrupt/event generation modes; an 10/100/1000 Ethernet media access controller (EMAC), which provides an efficient interface between the SM320C6457-HIREL DSP core processor and the network; a management data input/output (MDIO) module (also part of the EMAC) that continuously polls all 32 MDIO addresses in order to enumerate all PHY devices in the system; a glueless external memory interface (64-bit EMIFA), which is capable of interfacing to synchronous and asynchronous peripherals; and a 32-bit DDR2 SDRAM interface.
***AS
The SM320C6457-HIREL device has three high-performance embedded coprocessors [one enhanced Viterbi Decoder Coprocessor (VCP2) and two enhanced Turbo Decoder Coprocessors (TCP2_A and TCP2_B)] that significantly speed up channel-decoding operations on-chip. The VCP2 operating at CPU clock ÷ 3 can decode more than 694 7.95-Kbps adaptive multi-rate (AMR) [K = 9, R = 1/3] voice channels. The VCP2 supports constraint lengths K = 5, 6, 7, 8, and 9, rates R = 3/4, 1/2, 1/3, 1/4, and 1/5, and flexible polynomials, while generating hard decisions or soft decisions. Each TCP2 operating at CPU clock ÷ 3 can decode up to fifty 384-Kbps or eight 2-Mbps turbo encoded channels (assuming 6 iterations). The TCP2 implements the max*log-map algorithm and is designed to support all polynomials and rates required by Third-Generation Partnership Projects (3GPP and 3GPP2), with fully programmable frame length and turbo interleaver. Decoding parameters such as the number of iterations and stopping criteria are also programmable. Communications between the VCP2/TCP2s and the CPU are carried out through the EDMA3 controller.
***ASI
The SM320C6457-HIREL device has a complete set of development tools, which includes: a new C compiler, an assembly optimizer to simplify programming and scheduling, and a Windows® debugger interface for visibility into source code execution.
Processors
OMO Electronic Processors provide a comprehensive portfolio, proven software, and worldwide support enabling industry-leading automotive and industrial solutions. TI is dedicated to advancing and optimizing today’s processors to meet tomorrow’s intelligence, performance and cost requirements in automotive and industrial applications. Scalable hardware and software platforms with common code allow designers to seamlessly reuse and migrate across devices to protect future investment.
Teil # Beschreibung Aktie Preis
SM320C6457CGMHS
DISTI # 29450238
SM320C6457CGMHS1200
  • 900:$225.0000
  • 600:$230.8442
  • 300:$237.0000
  • 60:$243.4932
SM320C6457CGMHS
DISTI # SM320C6457CGMHS
DSP Fixed-Point 32-Bit 1200MHz 9600MIPS 688-Pin FCBGA - Trays (Alt: SM320C6457CGMHS)
RoHS: Compliant
Min Qty: 240
Container: Tray
Americas - 0
  • 240:$296.6900
  • 360:$289.3900
  • 600:$278.0900
  • 1200:$271.2900
  • 2400:$266.3900
SM320C6457CGMHS
DISTI # 595-SM320C6457CGMHS
Digital Signal Processors & Controllers - DSP, DSC Comm Infrastructure DSP
RoHS: Not compliant
0
  • 1:$252.4000
  • 5:$248.8400
  • 10:$241.7300
  • 25:$239.9700
Bild Teil # Beschreibung
SM320C6457CGMHS

Mfr.#: SM320C6457CGMHS

OMO.#: OMO-SM320C6457CGMHS

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Mfr.#: SM320C6202GJLA20EP

OMO.#: OMO-SM320C6202GJLA20EP

Digital Signal Processors & Controllers - DSP, DSC Fxd-pt Dig Sig Proc Mil enhanced
SM320C6457CGMHS

Mfr.#: SM320C6457CGMHS

OMO.#: OMO-SM320C6457CGMHS-1122

Digital Signal Processors & Controllers - DSP, DSC Comm Infrastructure DSP
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Mfr.#: SM320C6455BGTZEP

OMO.#: OMO-SM320C6455BGTZEP-TEXAS-INSTRUMENTS

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Mfr.#: SM320C6202GJLA20EP

OMO.#: OMO-SM320C6202GJLA20EP-TEXAS-INSTRUMENTS

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SM320C6701GJCA12EP

Mfr.#: SM320C6701GJCA12EP

OMO.#: OMO-SM320C6701GJCA12EP-TEXAS-INSTRUMENTS

Digital Signal Processors & Controllers - DSP, DSC Fltg-pt Dig Sig Proc Mil enhanced
SM320C6455BGTZ

Mfr.#: SM320C6455BGTZ

OMO.#: OMO-SM320C6455BGTZ-1190

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Mfr.#: SM320C6678ACYPA

OMO.#: OMO-SM320C6678ACYPA-1190

Neu und Original
SM320C6701GLPS16

Mfr.#: SM320C6701GLPS16

OMO.#: OMO-SM320C6701GLPS16-1190

DSP Floating-Point 32bit 167MHz 1336MIPS 429-Pin CFCBGA Tray
SM320C6701GLPW1

Mfr.#: SM320C6701GLPW1

OMO.#: OMO-SM320C6701GLPW1-1190

Neu und Original
Verfügbarkeit
Aktie:
Available
Auf Bestellung:
2500
Menge eingeben:
Der aktuelle Preis von SM320C6457CGMHS dient nur als Referenz. Wenn Sie den besten Preis erhalten möchten, senden Sie bitte eine Anfrage oder senden Sie eine direkte E-Mail an unser Verkaufsteam [email protected]
Referenzpreis (USD)
Menge
Stückpreis
ext. Preis
1
252,40 $
252,40 $
5
248,84 $
1 244,20 $
10
241,73 $
2 417,30 $
25
239,97 $
5 999,25 $
Aufgrund von Halbleiterknappheit ab 2021 ist der untere Preis der Normalpreis vor 2021. Bitte senden Sie eine Anfrage zur Bestätigung.
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