SN74ALVCH162835DLR

SN74ALVCH162835DLR
Mfr. #:
SN74ALVCH162835DLR
Beschreibung:
IC UNIV BUS DVR 18BIT 56SSOP
Lebenszyklus:
Neu von diesem Hersteller.
Datenblatt:
SN74ALVCH162835DLR Datenblatt
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SN74ALVCH162835DLR Mehr Informationen SN74ALVCH162835DLR Product Details
Produkteigenschaft
Attributwert
Hersteller
Texas Instruments
Produktkategorie
Logik - Universelle Busfunktionen
Serie
74ALVCH
Verpackung
Band & Spule (TR)
Paket-Koffer
56-BSSOP (0.295", 7.50mm Width)
Betriebstemperatur
-40°C ~ 85°C
Befestigungsart
Oberflächenmontage
Spannungsversorgung
1.65 V ~ 3.6 V
Lieferanten-Geräte-Paket
56-SSOP
Anzahl der Schaltungen
18-Bit
Anzahl der Eingänge
-
Strom-Ausgang-High-Low
12mA, 12mA
Logik-Typ
Universeller Busfahrer
Tags
SN74ALVCH162835, SN74ALVCH16283, SN74ALVCH1628, SN74ALVCH162, SN74ALVCH1, SN74ALVCH, SN74ALVC, SN74ALV, SN74AL, SN74A, SN74, SN7
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
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we buy and manage excess electronic components, including excess inventory identified for disposal.
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Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS DVR 18BIT 56SSOP
***as Instruments
This 18-bit universal bus driver is designed for 1.65-V to 3.6-V VCC operation. Data flow from A to Y is controlled by the output-enable (OE)\ input. The device operates in the transparent mode when the latch-enable (LE) input is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state. The output port includes equivalent 26- series resistors to reduce overshoot and undershoot. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The SN74ALVCH162835 is characterized for operation from –40C to 85C.
Teil # Beschreibung Aktie Preis
SN74ALVCH162835DLR
DISTI # SN74ALVCH162835DLR-ND
IC UNIV BUS DVR 18BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)
Limited Supply - Call
    SN74ALVCH162835DLR
    DISTI # 595-SN74ALVCH162835D
    Bus Transceivers 18-Bit Univ Bus Drv With 3-State Outputs
    RoHS: Compliant
    0
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      Verfügbarkeit
      Aktie:
      Available
      Auf Bestellung:
      2000
      Menge eingeben:
      Der aktuelle Preis von SN74ALVCH162835DLR dient nur als Referenz. Wenn Sie den besten Preis erhalten möchten, senden Sie bitte eine Anfrage oder senden Sie eine direkte E-Mail an unser Verkaufsteam [email protected]
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      Aufgrund von Halbleiterknappheit ab 2021 ist der untere Preis der Normalpreis vor 2021. Bitte senden Sie eine Anfrage zur Bestätigung.
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