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| PartNumber | 849N202CKI-020LF | 849N202CKI-021LF | 849N202CKI-020LFT |
| Description | Clock Synthesizer / Jitter Cleaner Frequency Translator IC | Clock Synthesizer / Jitter Cleaner JITTER ATTENUATOR | IC TRANSLATOR UNIV FREQ 40VFQFN |
| Manufacturer | IDT (Integrated Device Technology) | IDT, Integrated Device Technology Inc | IDT, Integrated Device Technology Inc |
| Product Category | Clock Synthesizer / Jitter Cleaner | Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers | Clock/Timing - Clock Generators, PLLs, Frequency Synthesizers |
| RoHS | Y | - | - |
| Series | 849N202 | FemtoClockR NG | FemtoClockR NG |
| Packaging | Tray | Tray Alternate Packaging | Tape & Reel (TR) Alternate Packaging |
| Brand | IDT | - | - |
| Product Type | Clock Synthesizers / Jitter Cleaners | - | - |
| Factory Pack Quantity | 490 | - | - |
| Subcategory | Clock & Timer ICs | - | - |
| Tradename | FemtoClock | - | - |
| Type | - | * | * |
| Mounting Style | - | SMD/SMT | - |
| Package Case | - | VFQFN-40 | 40-VFQFN Exposed Pad |
| Operating Temperature | - | -40°C ~ 85°C | -40°C ~ 85°C |
| Mounting Type | - | Surface Mount | Surface Mount |
| Voltage Supply | - | 2.375 V ~ 3.465 V | 2.375 V ~ 3.465 V |
| Supplier Device Package | - | 40-QFN (6x6) | 40-QFN (6x6) |
| PLL | - | Yes with Bypass | Yes with Bypass |
| Input | - | HCSL, LVDS, LVHSTL, LVPECL, Crystal | HCSL, LVDS, LVHSTL, LVPECL, Crystal |
| Output | - | LVPECL | LVDS |
| Number of Circuits | - | 1 | 1 |
| Ratio InputOutput | - | 1899/12/30 3:02:00 | 1899/12/30 3:02:00 |
| Differential InputOutput | - | Yes/Yes | Yes/Yes |
| Frequency Max | - | 161.13MHz | 156.25MHz |
| Divider Multiplier | - | Yes/No | Yes/No |
| Number of Outputs | - | 2 Output | - |
| Maximum Operating Temperature | - | + 85 C | - |
| Minimum Operating Temperature | - | - 40 C | - |
| Operating Supply Current | - | 320 mA | - |
| Supply Voltage Max | - | 3.465 V | - |
| Supply Voltage Min | - | 3.135 V | - |
| Maximum Input Frequency | - | 710 MHz | - |
| Max Output Freq | - | 1300 MHz | - |
| Output Level | - | LVDS LVPECL | - |
| Input Level | - | HCSL LVDS LVHSTL LVPECL | - |