74ALVCH16524DLRG4

74ALVCH16524DLRG4
Mfr. #:
74ALVCH16524DLRG4
Beschreibung:
IC UNIV BUS TXRX 18BIT 56SSOP
Lebenszyklus:
Neu von diesem Hersteller.
Datenblatt:
74ALVCH16524DLRG4 Datenblatt
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74ALVCH16524DLRG4 Mehr Informationen 74ALVCH16524DLRG4 Product Details
Produkteigenschaft
Attributwert
Hersteller
Texas Instruments
Produktkategorie
Logik - Universelle Busfunktionen
Serie
74ALVCH
Verpackung
Tape & Reel (TR) Alternative Verpackung
Paket-Koffer
56-BSSOP (0.295", 7.50mm Width)
Betriebstemperatur
-40°C ~ 85°C
Befestigungsart
Oberflächenmontage
Spannungsversorgung
1.65 V ~ 3.6 V
Lieferanten-Geräte-Paket
56-SSOP
Anzahl der Schaltungen
18-Bit
Anzahl der Eingänge
-
Strom-Ausgang-High-Low
24mA, 24mA
Logik-Typ
Universal-Bus-Transceiver
Tags
74ALVCH1652, 74ALVCH165, 74ALVCH1, 74ALVCH, 74ALVC, 74ALV, 74AL, 74A
Service Guarantees

We guarantee 100% customer satisfaction.

Quality Guarantees

We provide 90-360 days warranty.

If the items you received were not in perfect quality, we would be responsible for your refund or replacement, but the items must be returned in their original condition.
Our experienced sales team and tech support team back our services to satisfy all our customers.

we buy and manage excess electronic components, including excess inventory identified for disposal.
Email us if you have excess stock to sell.

Email: [email protected]

Step1: Vacuum Packaging with PL
Step1:
Vacuum Packaging with PL
Step2: Anti-Static Bag
Step2:
Anti-Static Bag
Step3: Packaging Boxes
Step3:
Packaging Boxes
***i-Key
IC UNIV BUS TXRX 18BIT 56SSOP
***as Instruments
This 18-bit universal bus transceiver is designed for 1.65-V to 3.6-V VCC operation. Data flow in each direction is controlled by output-enable (OEAB\ and OEBA\) and clock-enable (CLKENBA\) inputs. For the A-to-B data flow, the data flows through a single buffer. The B-to-A data can flow through a four-stage pipeline register path, or through a single register path, depending on the state of the select (SEL\) input. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input, provided that the appropriate CLKENBA\ input is low. The B-to-A data transfer is synchronized with CLK. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.
Teil # Beschreibung Aktie Preis
74ALVCH16524DLRG4
DISTI # 74ALVCH16524DLRG4-ND
IC UNIV BUS TXRX 18BIT 56SSOP
RoHS: Compliant
Min Qty: 1000
Container: Tape & Reel (TR)
Limited Supply - Call
    74ALVCH16524DLRG4
    DISTI # 595-74ALVCH16524DLRG
    Bus Transceivers 18-Bit Regstr Bus Trncvr W/3-St Otpt
    RoHS: Compliant
    0
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      Verfügbarkeit
      Aktie:
      Available
      Auf Bestellung:
      4000
      Menge eingeben:
      Der aktuelle Preis von 74ALVCH16524DLRG4 dient nur als Referenz. Wenn Sie den besten Preis erhalten möchten, senden Sie bitte eine Anfrage oder senden Sie eine direkte E-Mail an unser Verkaufsteam [email protected]
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